发明名称 PULSE COUNTER
摘要 PURPOSE:To attain high-speed counting by adoting the design that a mean value between the present and preceding count values is adopted when the difference between the said mean value and the present count value is smaller than + or -1 and the present count value is adopted when the difference is larger to eliminate an error of + or -1 without increasing the resolution of a pulse transmitter. CONSTITUTION:An output pulse of a pulse oscillator 1 is counted by a prescribed sampling period by a counter 2, the count value is fetched to a controller main body 3 and fed to a control variable 4. In case of the sampling, a mean value is obtained at the 1st time while regarding the same value for the preceding time, and since the mean value is equal to the count value in this case, the value is adopted. A mean value N between the preceding count value N1 and the present count value N2 is obtained at the 2nd and succeeding operation and when the difference between the value N and the present value N2 is smaller than + or -1, the count value N is brought into count values N1, N2 after correction, and when the present mean value is larger, both the preceding and present count values are adopted. As a result, the error is halved, the instability of the control system is eliminated and the control with good response is attained.
申请公布号 JPS60194827(A) 申请公布日期 1985.10.03
申请号 JP19840051658 申请日期 1984.03.16
申请人 MEIDENSHA KK 发明人 MURAKAMI MASAKI
分类号 H03K21/18;H03K21/40;(IPC1-7):H03K21/40 主分类号 H03K21/18
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