发明名称 CONFIRMATION SYSTEM FOR FAULT PROCESSING FUNCTION OF INFORMATION PROCESSOR
摘要 PURPOSE:To simplify automatic fault processing operation and to facilitate easy confirmation of fault processing function, by producing a pseudo machine error at a time point designated previously within a program. CONSTITUTION:A program instruction given from a main memory 1 is decoded and executed by an arithmetic control circuit 2. A control register 3 receives a control register set signal from the circuit 2 and controls the generation of a machine error. Then a machine error generation control circuit 8 produces a report on said machine error when an overflow detection signal is supplied while the control register output signal given from the register 3 is kept effective. A fault processor 9 performs the error processing in response to the machine error report signal given from the circuit 8.
申请公布号 JPS60193052(A) 申请公布日期 1985.10.01
申请号 JP19840047191 申请日期 1984.03.14
申请人 NIPPON DENKI KK 发明人 JITSUPOU AKIRA
分类号 G06F11/00;G06F11/07;G06F11/26 主分类号 G06F11/00
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