Driving circuit for an electrostatic recording head

摘要

The invention is a driving circuit for an electrostatic recording head which reduces the turn-on time, the storage time and the turn-off time of the driving circuit output pulses. Mutually complementary first and second transistors are connected with their collectors in common. A first driving signal is supplied via a coupling capacitor to the base of the first transistor, and is also supplied to the base of the second transistor. High voltage is supplied to the emitter of the first transistor. The output signal is obtained from the interconnection of the common collectors. The first driving signal has three sequential levels, two of which occur within the time period when the recording picture signals are supplied. The first level e2 is the highest and occurs during the beginning portion of the recording signal and the second level e1 is lower than e2 and occurs during the remaining portion of the recording signal. The third level is the smallest (i.e., zero or ground level (o)) and occurs immediately after e1 when no recording signals are supplied. A second driving signal is applied to the emitter of the second transistor. The second driving signal has two non-zero sequential levels (i.e., e4 and e3). The first level e4 is the larger of the two and occurs at the end of e1 and continues for a time approximately equal to or greater than Tc. The second level e3 occurs immediately after e4.