,申请号JP19770049214-传众专利搜索

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法人/股东/高管

发明名称
摘要	PURPOSE:To obtain a CMOSIC featuring an extremely reduced possibility of the ratch-up occurrence without increasing the chip size nor adding new manufacturing processes.
申请公布号	JPS6042622(B2)	申请公布日期	1985.09.24
申请号	JP19770049214	申请日期	1977.04.27
申请人	NIPPON ELECTRIC CO	发明人	YOSHITAKE KAZUKI
分类号	H01L27/08;H01L27/092;H01L29/78	主分类号	H01L27/08
代理机构		代理人
主权项
地址

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