发明名称 SELECTIVE CALL RECEIVER
摘要 PURPOSE:To stop the error correction operation by providing a circuit collating a selective call signal with the own individual number code in the order of reception and counting number of dissident bit to detect a point of time when the number of dissident bits is a prescribed bit or over. CONSTITUTION:The selective call signal from a base station is demodulated by a reception circuit 2 and its demodulated output is inputted to an error correction operating circuit 3 and the 2nd collating circuit 10. The circuit 3 applies error correction and the demodulation signal subject to error correction is added to a collation circuit 4. The circuit 4 and the 2nd collating circuit 10 are connected in parallel and a ROM5 storing the own individual number code is connected to each of them. Then the call signal demodulated by the collating section of the collation circuit 10 and the individual number code stored in the ROM5 are compared and collated at the reception side one by one bit each and the number of dissidence of the result of comparison is counted by a counter section. When the count value reaches a prescribed value, a dissidence detecting signal is fed to the circuits 2-4 so as to stop the error correcting operation.
申请公布号 JPS60182232(A) 申请公布日期 1985.09.17
申请号 JP19840037577 申请日期 1984.02.29
申请人 NIPPON DENSHIN DENWA KOSHA;TOSHIBA KK 发明人 SUZUKI YUUJI;MURAI MAKOTO;SEKIKAWA TATSUAKI
分类号 H04W52/02;H04L1/00;H04W84/02 主分类号 H04W52/02
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