| 摘要 |
PURPOSE:To obtain a large operating margin by designing the circuit so that an affirmative output and a negative output are crossed at a low current level when a set input and a reset input of an FF circuit are replaced together. CONSTITUTION:FF1-FF3 are connected in cascade mutually. The FF1-FF3 have respectively two Josephson elements J3.J4, J5.J6 and J7.J8, and an AND output between an output Q1 of the FF1 and a set input S is inputted to a set input terminal S3 of the FF2. Similarly, an AND output between an output Q2 of the FF2 and the input S is inputted to a set input terminal of the FF3. Further, an AND output between an output Q3' (Q2') of the FF3 (FF2) and a reset input R is inputted to a reset input terminal R2 (R1) of the FF2 (FF1). In increasing the number of the FF circuits connected in cascade in this way, since the delay time is increased and a cross point between the outputs Q1' and Q3 reaches a level far smaller than the level of a half of a threshold value IC. Thus, the Josephson logic circuit of FF operation with a large operating margin is obtained. |
