发明名称 Comparator circuit
摘要 This relates to a comparator circuit for monitoring intelligence on a data bus, which circuit consumes no power until activated by a predetermined voltage on the data bus. An input PNP transistor has a base coupled to the data bus. An emitter resistor and a collector resistor may be scaled to achieve a desired switching threshold. A second PNP transistor has a base coupled to the bus and an emitter coupled to the collector of the first PNP transistor such that the second PNP transistor does not turn on until the first PNP transistor saturates. The collector of the second PNP transistor is coupled to the base of an output NPN transistor and supplies drive thereto when the second PNP transistor is on.
申请公布号 US4542303(A) 申请公布日期 1985.09.17
申请号 US19830538619 申请日期 1983.10.03
申请人 MOTOROLA, INC. 发明人 JARRETT, ROBERT B.;NEIDORFF, ROBERT A.
分类号 H03K5/08;G01R19/165;(IPC1-7):H03K5/153 主分类号 H03K5/08
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