| 摘要 |
<p>In apparatus for error correction in which data sequences containing blocks of data, previously arranged on a known time-base, and formed of data words and check words are written into a memory under control of a write address generator, and the data sequences are subsequently read out from the memory under control of a write address generator, so as to generate rearranged data sequences; during writing and reading of the data sequences, error correction is carried out by apparatus that includes an error correction arithmetic circuit for performing the error correction calculation, a pointer addition circuit for adding a pointer to the data words in association with an error state of the blocks, and a memory for memorizing a microprogram having fields to control the error correction arithmetic circuit and pointer addition circuit.</p> |
