发明名称 PHASE LOCKED LOOP
摘要 PURPOSE:To attain ease of adjustment of a DC offset by connecting an optional number of amplifiers between a phase comparator and a low-pass filter and connecting an amplifier between the low-pass filter and a voltage-controlled oscillator. CONSTITUTION:An optional number of amplifiers 141-14n are connected between the low-pass filter 13 and the phase comparator 12 comparing the phase between an input signal and an output signal of the voltage controlled oscillator 15, and an amplifier 14A having a gain of the unity or over is connected between the said low-pass filter 13 and the said voltage-controlled oscillator 15. Then a desired loop gain is obtained from the sum of each amplfier and it is possible to obtain the desired loop gain without increasing the gain of each amplifier. Thus, the offset adjustment of the amplifier of each stage is performed easily to stabilize the phase locking.
申请公布号 JPS60169225(A) 申请公布日期 1985.09.02
申请号 JP19840022829 申请日期 1984.02.13
申请人 FUJITSU KK 发明人 YANO KAZUO;SASAKI SUSUMU
分类号 H03L7/093 主分类号 H03L7/093
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