| 摘要 |
PURPOSE:To transmit without requiring a control character as to frame synchronism by transmitting a signal representing the start of transmission via another line in transmitting a data from the 1st device to the 2nd device via a data line. CONSTITUTION:The system is explained as to the case that a data is transmitted from other system 2 to a CPU4 through a data line B via an I/O port 9. When the system 2 gives ''1'', ''0'' signal from terminals A0, C5 to a tri-state buffer 12 via a gate 10 and an AND circuit 11 as a status signal at first, terminals 1Y, 1A and 2Y, 2A and 3Y, 3A are conducted respectively. Thus, an output of a terminal IBF of the port 9 is transmitted to a terminal D0 of the system 2, the system 2 recognizes the point of time of start of transmission, transmits the signal of ''1'', ''0'' and ''0'' from the terminal A0 and a C5WT respectively and transmits the data to the CPU4 via the line B. This is applied similarly in the case that the data is transmitted from the CPU4 to the system 2 via the port 9.
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