发明名称 CONTROLLING LSI OF LARGE CAPACITY AUXILIARY STORAGE DEVICE
摘要 PURPOSE:To reduce a burden of a host computer, and to simplify an interface by providing a processor in the inside, managing both a hard disk device and a backup device, and also providing a DMA function. CONSTITUTION:A processor part 2 consists of a processor unit 21 and a ROM/ RAM22, and executes a management of the whole operation of an LSI1 and a control, etc. of a direct memory access (DMA). A data transfer to a host computer is executed based on an operation of a DMA controlling circuit 32 of a host interface part 3. A disk control part 4 executes a processing corresponding to a format of a disk and generates an interface signal of each device. At the same time, a control of a cyclic redundancy check is executed. These executions are all operated under a management of the processor part 2, a state of the operation and its result are analyzed by the processor part 2, and an appropriate processing is executed.
申请公布号 JPS60159927(A) 申请公布日期 1985.08.21
申请号 JP19840016768 申请日期 1984.01.30
申请人 SHARP KK 发明人 KAJIGAWA HIROKI
分类号 G06F3/06;G06F13/28 主分类号 G06F3/06
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