发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To realize an ultrahigh integrated RAM such as a multi-value memory which is required to detect fine charge by using a differential amplifier provided with the function of single and end output as a charge detection mechanism. CONSTITUTION:The titled device is provided with a MOSFET to compensate the variance of threshold value voltage of a pair of differential MOSFETs. A pair of data lines 640 and 641 have plural pairs of word lines and one pair of dummy word lines arranged in crossing. When a signal phiS1 is at a high voltage, a dummy cell connected to a data line 640 and one memory cell connected to a data line 641 are selected and when the signal -phiS1 is at a high voltage, the cells opposite to the above are selected individually. An actual storage consists of plural memory cell array blocks and the differential amplifying mechanism for each block, thereby the timing detection action required for the multi-value memory is attained without giving any change to the data line potential at the time of the signal detection action.
申请公布号 JPS60154395(A) 申请公布日期 1985.08.14
申请号 JP19840010078 申请日期 1984.01.25
申请人 HITACHI SEISAKUSHO KK 发明人 NAKAGOME YOSHINOBU;HORIGUCHI SHINJI;AOKI MASAKAZU;SHIMOHIGASHI KATSUHIRO;MASUHARA TOSHIAKI;IKENAGA SHINICHI
分类号 G11C11/56;G11C11/34;H01L21/8242;H01L27/10;H01L27/108 主分类号 G11C11/56
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