| 摘要 |
PURPOSE:To improve the charge holding characteristics of an MOS dynamic memory, and to eliminate a limit on a layout between a peripheral circuit for an MOS dynamic RAM and a cell block by applying reverse voltage between an N type semiconductor substrate and a P type semiconductor layer formed on the N type semiconductor substrate. CONSTITUTION:Supply voltage VCC is applied to an N type semiconductor substrate 11 and negative voltage to a P type semiconductor region 1 by a known negative voltage generating circuit constituted on a chip to a ground level in an MOS dynamic RAM. Consequently, the greater part of electrons as a small number of carriers generated by impact ionization from an MOSFET for a peripheral circuit in the MOS dynamic RAM are collected to the N type semiconductor substrate 11 side before they reach near the FET and to a charge storage region for a memory cell, thus improving the charge holding characteristics of the MOS dynamic memory. A limit on a layout between the peripheral circuit for the MOS dynamic RAM and a cell block, a space between these peripheral circuit and cell block, can further be shortened. |
