| 摘要 |
PURPOSE:To increase the executing speed of an input/output instruction in a specific condition code mode by using an interface which always transmits the factor information of a specific condition code within a channel to a central processor for each channel. CONSTITUTION:When a CPU1 delivers an input/output instruction, the information on an operation part (OP) of the instruction, a channel number CH#, etc. is set to an instruction register (IR)11. While each channel group 23 inside a channel device CHP2 always transmits the information on the factor for production of a specific code such as ''inoperable'' or ''busy'' to a channel condition code register 14 corresponding to each channel within the CPU1. One of information of an operation part OP111 of the IR11 and the register 14 is supplied to AND circuits 161 and 162. When a channel specific condition code is satisfied, the output signal of an OR circuit 163 closes gate circuits G1 and G2. |
