发明名称 DIAGNOSTIC SYSTEM
摘要 In a logical unit provided with a plurality of internal registers (12 to 15; 20), an internal memory (11-1, 11-2; 21) and a combinational circuit (16), such as an arithmetic unit, at least one (13 or 14; 20) of the plurality of internal registers is arranged to be scanned in and out. During diagnosis, when executing an instruction which makes reference to the internal memory (11-1, 11-2; 21), the register than can be scanned in and scanned out is used in place of the internal memory 11-1, 11-2; 21) for diagnosing the combinational circuit (16).
申请公布号 EP0087314(A3) 申请公布日期 1985.07.31
申请号 EP19830300907 申请日期 1983.02.22
申请人 FUJITSU LIMITED 发明人 SHIOYA, KATSUHIKO C/O FUJITSU LTD. PATENT DPT.;IFUKU, TETSUHIKO C/O FUJITSU LTD. PATENT DPT.;INAMASU, SEIICHI C/O FUJITSU LTD. PATENT DPT.
分类号 G06F11/22;G06F11/267;G06F11/273;(IPC1-7):G06F11/26 主分类号 G06F11/22
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