| 摘要 |
PURPOSE:To allow the titled circuit to execute stable and high-speed operation for an input signal by providing a circuit which controls the second control signal to keep the electric potential high level for the prescribed time when the first control signal changes from the low level to the high level. CONSTITUTION:A latch signal phi10 is connected to the gate of a transistor Q1 which adds an input signal and a control signal phi1 is connected to the drain of a charge transistor Q30 of a dynamic circuit. When the control signal phi1 is activated and it rises from the low level to the high level, the latch signal phi10 rises furthermore from the initial high electric potential. At the same time, the input impedance of the input transistor Q1 decreases, the input is transmitted to the gate of a transistor Q3 at a high speed, the transistor Q3 generates the input signal and the inversion auxiliary signal as the output voltage at a high speed when the input signal changes from the high level to the low level, and vice versa. As a result, a data input circuit with stability and a high speed can be obtained. |
