| 摘要 |
PURPOSE:To facilitate design alteration by a method wherein the titled pattern is formed by arranging reference points of patterns forming wirings, transistors, resistors, contacts, and the like on horizontal and vertical directional variable lattices formed on the basis of the design reference. CONSTITUTION:With respect to each of horizontal direction and vertical direction, the lattices 10 are formed according to the design rule of transistor size, contact size, wiring width, and the like, and the reference points constituting the patterns of components such as a power source wiring 1, a ground potential wiring 2, metallic wiring layers 5, diffused layers 3, poly Si gates 4, a power source contact 6, a ground contact 7, and diffusion contacts 8 are arranged on the lattices. This manner enables the production of a layout pattern fitted to a new design rule only by varying the interval of each lattice in the case of alteration in a design rule. For example, the case of the increase in the width of the poly Si gate can be coped with by enlargement of the interval of the lattice in the vertical direction. Therefore, the production of mask patterns according to the alteration in design rule can be easily carried out. |
