发明名称 NONLINEAR ARITHMETIC CIRCUIT
摘要 PURPOSE:To obtain a nonlinear arithmtic circuit having high accuracy by converting the level of an input signal into pulses by an incorporated pulse generator, a counter and a D/A converter, defining the number of pulses as an address to read out the contents of a memory and converting an input signal. CONSTITUTION:A counter 43 counts up the rectangular pulses produced periodically from a pulse generating circuit 41 via an AND gate 42. This counting result is converted into analog signals by a D/A converter 48. When the output of the converter 48 is equal to the level of an input signal 44, the signal of a comparator 49 is inverted. Then a timing circuit 50 delivers a timing signal to close the gate 42. Thus the counter 43 holes its count value, and the output of the counter 43 is sent to a ROM45. When the output of the ROM45 is stabilized, the circuit 50 sends a latch pulse to a latch circuit 46. The memory contents of the ROM45 delivered at this time point transmits 51 the analog signal via a D/A converter 47.
申请公布号 JPS60138684(A) 申请公布日期 1985.07.23
申请号 JP19830244782 申请日期 1983.12.27
申请人 FUJI DENKI SEIZO KK 发明人 KATOU SHIGERU
分类号 G06G7/26;(IPC1-7):G06G7/26 主分类号 G06G7/26
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