| 摘要 |
PURPOSE:To obtain a decoder with a short synchronism pull-in time by utilizing unbalancing state of a code to detect an erroneous out of synchronism. CONSTITUTION:The unbalancing of an output of a 3B-4B inverter 103 is detected by a code rule violation detector 109. When a high frequency is detected by a frequency detector 110, a clock generator 111 shifts the phase and a voilation signal resets a frame synchronism circuit 113. |
