发明名称 INTERRUPTION PROCESSING UNIT
摘要 PURPOSE:To obtain a return address after execution of interruption processing by using an address generating means of a program counter and a program memory so as to generate a start address of interrupted processing. CONSTITUTION:When an interruption is given at the execution of instruction at 4A(H) during a group of processing using 40(H) as a start address, the content of a program counter 10 is outputted to a bus 22 by using an address output signal 30 to address the program memory, while the content is fed also to AND circuits 40-47 by an interruption reception signal 32. The content of a mask register 11 is fed to the ANd circuits 40-47 by using the interruption reception signal 32 at the same time. The AND circuits 40-47 AND the signals and the result 40(H) is stored in a stack register 12. A return instruction is executed at 1F(H) at the end of interruption. The interruption end signal 33 enters the stack register 12 and the content 40(H) of the register 12 is set to the program counter 10.
申请公布号 JPS60128535(A) 申请公布日期 1985.07.09
申请号 JP19830237419 申请日期 1983.12.16
申请人 NIPPON DENKI KK 发明人 KUSANO YUUKO
分类号 G06F9/46;G06F9/42;G06F9/48 主分类号 G06F9/46
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