| 摘要 |
PURPOSE:To perform the DMA (direct memory access) transfer processing easily in a high speed by dividing a single DMA channel of a DMA input/output part into plural kinds of channel and assigning them to plural DMA channels of a DMA control part. CONSTITUTION:A storage part 3, a DMA control part 4, and a DMA input/ output part 5 are connected to a bus 2 of a main control part 1, and a DMA switching part 6 is connected between the control part 4 and the input/output part 5, and a single DMA channel 7 of the input/output part 5 is divided into plural kinds of channel, and they are assigned to plural DMA channels 8 of the control part 4. For example, when DMA transfer is performed twice, channels '0' and '1' of the control part 4 are used for the first and the second DMA transfer respectively, and the main control part 1 indicates setting transfer modes of the first and second DMA transfer to determine the transfer direction, etc., and the channel '0' is switched to the channel '1' by the switching part 6 with respect to hardware after the first transfer is terminated. Thus, the preparation for the second DMa transfer is completed without requiring the DM transfer stop period. |
