发明名称 MANUFACTURE OF INTEGRATED CIRCUIT
摘要 PURPOSE:To improve the characteristics and the yield of IC's by reducing the amount of side etching and its variation by a method wherein the first plasma etching is performed to the surface of a polycrystalline layer deposited on a semiconductor substrate, thus forming polycrystallne wirings over the whole region of the surface; and unnecessary parts of them are removed by the second plasma etching. CONSTITUTION:The polycrystalline layer is deposited on the surface of the semiconductor substrate 1, and a photo mask having a polycrystalline wiring region A and a dummy wiring region B positioned at the part other than this region is provided on the surface. Next, wiring photo resist patterns 5 and dummy wiring photo resist patterns 6 are formed on the surface of the polycrystalline layer by means of the mask. At this time, the total extension of the patterns 6 are made as long as possible. Thereafter, polycrystalline patterns 5a and 6a of the regions A and B are simultaneously formed by the first plasma etching; the region A is covered with the second photo mask, the second photo resist pattern 7 being provided, and the wirings 6a of the region B being them removed by the second etching.
申请公布号 JPS60124941(A) 申请公布日期 1985.07.04
申请号 JP19830234010 申请日期 1983.12.12
申请人 TOSHIBA KK 发明人 FUJITA HIROSHI
分类号 H01L21/302;H01L21/3065;H01L21/308;H01L21/3213;(IPC1-7):H01L21/302 主分类号 H01L21/302
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