发明名称 Remap method and apparatus for a memory system which uses partially good memory devices
摘要 A remapping method and apparatus is employed by a memory controller system which includes a microprocessing section which couples to a memory section. The memory section includes a partially good bulk random access memory constructed from a plurality of bit wide chips containing a predefined small number of row or column faults randomly distributed. System columns of chips are organized into a plurality of groups or slices, each of which provide a different predetermined portion of the locations within the partially good bulk memory. A defective-free memory having substantially less capacity is similarly organized. Both memories couple to a static memory which is remapped under the control of the microprocessing section. Prior to remapping, the microprocessing section generates a "slice bit map" indicating the results of testing successive bit groups/slices within the bulk memory locations. Thereafter, the microprocessor section interprets the "slice bit map" and assigns column addresses in the static memory locations designating locations within the defect-free memory. The assignment is carried out in a predetermined manner according to fault category to maximize the use of all of the groups of bit locations within each defect free memory location thereby making storage available for remapping new faults.
申请公布号 US4527251(A) 申请公布日期 1985.07.02
申请号 US19820450691 申请日期 1982.12.17
申请人 HONEYWELL INFORMATION SYSTEMS INC. 发明人 NIBBY, JR., CHESTER M.;GOLDIN, REENI;ANDREWS, TIMOTHY A.
分类号 G06F12/02;G11C29/00;(IPC1-7):G06F13/00 主分类号 G06F12/02
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