发明名称 SAMPLE AND HOLD CIRCUIT
摘要 PURPOSE:To attain the sharp switching between sampling and holding modes by connecting a switch element to a differential coupling point and turning on and off the switch element in the holding and sampling modes respectively to hold the input information. CONSTITUTION:A sampling pulse SP is applied to the base of a switching transistor TRQ10, and a high level LA of the pulse SP becomes higher than the DC level of an input signal Vi to be applied to a TRQ1. Then the TRQ10 is turned on and the base-emitter is adversely biased for TRQ1 and Q2 respectively. Thus the TRQ1 and Q2 are turned off. The SP is set lower than the DC level of the Vi in a sampling section. Then the TRQ10 is turned off with paired TRQ1 and Q2 turned on respectively to perform an integrating action. Thus the sharp switching is possible between sampling and holding modes with no effect given from the capacity of an active element or a circuit connecting electrode.
申请公布号 JPS60124096(A) 申请公布日期 1985.07.02
申请号 JP19830231099 申请日期 1983.12.07
申请人 SONY KK 发明人 UTSUNOMIYA KIMITAKE;FUKUSHIMA NORIYUKI;HASHIMOTO BUNJI
分类号 G11C27/02;(IPC1-7):G11C27/02 主分类号 G11C27/02
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