发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To maintain the overall processing speed of a semiconductor IC and to increase the ROM capacity by selecting the output of one of plural ROM blocks which give accesses to a ROM memory with clock signal having the same cycle and different phases. CONSTITUTION:A ROM memory which is used for the same purpose is divided into two blocks which receive accesses with clock signals phiA and phiB having the same cycle and different phases. Then either one of outputs OA and OB of ROM blocks ROM(A)1 and ROM(B)2 is selected. The outputs OA and OB are selected by a clock signal phiC with ''0'' and ''1'' respectively. The same cycle is secured between clock signals phiA and phiB of blocks ROM(A)1 and ROM(B)2 with phases shifted by T/2 to each other. Then the outputs of both ROM blocks are switched by T/2. Thus the ROM receives an access in a T/2 cycle. Thus the overall processing speed is increased for a semiconductor IC.</p>
申请公布号 JPS60124095(A) 申请公布日期 1985.07.02
申请号 JP19830230283 申请日期 1983.12.06
申请人 NIPPON DENKI KK 发明人 KACHI YOSHIO
分类号 F02B75/02;G11C17/00;(IPC1-7):G11C17/00 主分类号 F02B75/02
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