| 摘要 |
PURPOSE:To increase the chip memory capacity by providing a transmission line and a write gate connected in parallel between a write current pulse generating source and an earth source, a series circuit consisting of a termination resistance connected in parallel to the transmission line and a sense gate control line, and a sense gate respectively. CONSTITUTION:In a write mode a control current IY is impressed to a control line 15. A write gate 12 of Josephson junction is immediately switched to a voltage state from a superconduction state by the head pulse current of a current pulse train IW given from a write current pulse generating source 32. The subsequent current pulse train IW is switched to a transmission line 31 and reflected by an earth source 33 at a remote terminal 35 and returns to a near terminal 34. The drive of the train IW is finished immediately before the train IW returns to the terminal 34. Then the gate 12 is reset to its original superconduction state when the impression of the current IY is cut off. While the train IW of the line 31 flows when the gate 12 is set in the voltage state. Thus a sense gate control line 13 is driven. When a strobe pulse current IS flows synchronously with the train IW, the current pulse train is converted into a voltage pulse train by a sense gate 14 and then read out. |
