发明名称 BIPOLAR CMIS DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE:To improve the latchup withstand voltage of a CMOS element and to completely electrically separate a bipolar transistor by forming a high density buried layer under a region formed with a bipolar CMOS device. CONSTITUTION:High density buried layers 2, 3, 7, 8 are formed on a substrate 1. The buried layer 2 is formed under a region forming a bipolar transistor. The layer 3 is formed under a region for forming a P-channel CMOS element, and is a reverse conductive type N<+> type buried layer to the substrate together with the layer 2. A bipolar transistor, a P-channel CMOS element and an N-channel CMOS element are respectively formed in the N<-> type well layer 12, 13 and a P<-> type well layer 16 of the active regions. The latchup withstand voltage of the CMOS element is improved by the layer 3. Further, the electric separation of the bipolar transistor can be electrically separated by the layers 15 of the separated well layer and the layer 2.
申请公布号 JPS60120552(A) 申请公布日期 1985.06.28
申请号 JP19830228409 申请日期 1983.12.05
申请人 HITACHI SEISAKUSHO KK 发明人 ODAKA MASANORI;MIYAOKA SHIYUUICHI;OGIUE KATSUMI
分类号 H01L21/761;H01L21/8249;H01L27/06 主分类号 H01L21/761
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