发明名称 RESET SIGNAL GENERATOR
摘要 <p>PURPOSE:To perform an assured reset action by triggering a monostable multivibrator at the rise of a power supply recovery mode to deliver pulses and resetting a CPU with an OR between said pulse and a delay signal of a service interruption detecting signal. CONSTITUTION:The voltage supplied from a power supply terminal 14 is divided by a resistance and supplied to a voltage comparator 15. Input terminals IN and HYS have the hysteresis between a service interruption detection level and a power recovery detection level little higher than the service interruption detection level. The output of the comparator 15 is supplied to a monostable multivibrator 17 as well as to a delay circuit 20. Therefore it is possible to obtain the satisfactory pulse width by the multivibrator 17 despite a service interruption of a short time. This obtained pulse is used as a reset signal. Furthermore it is possible to eliminate the generation of a whisker-shaped waveform to the reset signal despite a high-speed actuation of a logical circuit 21 by obtaining an OR between the circuit 20 and the multivibrator 17.</p>
申请公布号 JPS60113515(A) 申请公布日期 1985.06.20
申请号 JP19830222650 申请日期 1983.11.24
申请人 MITSUBISHI DENKI KK 发明人 MIZUHARA HIROHISA
分类号 G06F1/24;H03K17/22 主分类号 G06F1/24
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