| 摘要 |
<p>A fast circuit switching system that establishes a circuit for each packet-sized data communication. A time-slot interchanger (5100) included in the system network (5000) has a sequential access, circulating control memory (5445), the contents of which can be rapidly and frequently changed with minimal impairment of time-slot interchanger throughput. Such changes are effected by controlling the transmission of information concerning established connections, from a control memory output register (5446-31) to a control memory input register (5446-0) and by controlling the transmission of information concerning new connections, to the control memory input register.</p> |
