发明名称 MOS TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To prevent the breakdown of a gate protective circuit itself generated by static electricity and the like by a method wherein a high impurity density diffusion layer of the same conductive type as a substrate is additionally provided between a diffusion layer constituting a gate protective circuit and a diffusion layer located in the vicinity of the diffusion layer, and said diffusion layer is brought in the same potential as the substrate. CONSTITUTION:An N<+> type diffusion layer 11 constituting a gate protective circuit and an N<+> type diffusion layer 12 which will be positioned in the vicinity of the layer 11 are provided on a P type Si substrate 13, the bottom face of which is in an earthed state, and they are formed into an MOS element having a gate protective circuit. According to this constitution, a P<+> type layer 21 is formed by diffusion between the diffusion layers 11 and 12, and the layer 11 is connected to an earth potential. As a result, a plus surge is added to the diffusion layer 11, the substrate potential in the vicinity of the diffusion layer 12 can be maintained in the earth potential through the diffusion layer 21 even when a breakdown current runs, the substrate potential in the vicinity of the diffusion layer 12 is not boosted, and the diffusion layer 12 is not biased in forward direction, thereby enabling to markedly improve electrostatic withstand voltage.
申请公布号 JPS60107865(A) 申请公布日期 1985.06.13
申请号 JP19830216704 申请日期 1983.11.17
申请人 TOSHIBA KK 发明人 KINOSHITA HIROYUKI
分类号 H03F1/52;H01L21/822;H01L27/02;H01L27/04;H01L29/78;H02H7/20;H03F1/00;H03F1/42 主分类号 H03F1/52
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