| 摘要 |
PURPOSE:To reduce a hardware amount by providing a flag representing whether or not a real address in each entry indicates an area for the hardware corresponding to each entry of an address conversion buffer. CONSTITUTION:Each entry of the address conversion buffer (TLB) 20 includes a flag F bit representing whether or not a read address in the said entry indicates an area HA for the hardware in addition to a logical address LA and a read address RA. A comparator 22 compares a logical address A read from the TLB20 with a high-order address of a logical address register 21. An output of the comparator 22 is fed to an access control circuit 23 together with an F bit read from the said entry of the TLB20 at the same time. An HA access mode bit is fed to an access control circuit 23 from a signal line 13 further.
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