| 摘要 |
PURPOSE:To reduce the deterioration of performance in a cache-off state by providing a data memory and a bypass buffer and using the bypass buffer as a data memory of small capacity. CONSTITUTION:A validity display bit for the inside of a control memory 8-2 is referred to when an access is given from a logical device 1. When the validity is decided, i.e., the desired data exists inside a data memory 6 or bypass buffer memory 7, an FB is defined. In this case, the output of the buffer 7 or the output of the 1st selection circuit 10 which are delivered via a memory 8-2, a control circuit 21 and a memory 6 is selected by the 2nd selection circuit 11 and transferred to the device 1 as the desired data. In a cathe-off mode, the FB is decided only when the store position set by the output of the memory 8-2 shows the buffer 7. In such a way, the buffer 7 is used as a data memory of small capacity to reduce the deterioration of performance in a cach-off state.
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