发明名称 DIGITAL-ANALOG CONVERTER
摘要 PURPOSE:To minimize the harmonic distortion factor by giving a potential of a half of the sum of two reference potentials Vcc and Vss to a reference bias terminal and a midpoint bias terminal respectively so as to attain an ideal bias state. CONSTITUTION:A bias circuit 20 providing a potential of (Vcc+Vss)/2 to the reference bias terminal 14 and the midpoint bias terminal 16 respectively as bias potentials VT and VM is provided. An analog output VOUT changes around the (Vcc+Vss)/2 so as to prevent a shift of VLSB/2. Thus, the voltage biasing the LSB side termination part of a resistor ladder network LA is nearly (Vcc+ Vss)/2.
申请公布号 JPS60105322(A) 申请公布日期 1985.06.10
申请号 JP19830213022 申请日期 1983.11.12
申请人 NIPPON GAKKI SEIZO KK 发明人 KADAKA TAKAYUKI;ISHIDA KATSUHIKO;TAKAHASHI TOSHIYUKI;OGATA TAKASHI
分类号 H03M1/78;(IPC1-7):H03M1/78 主分类号 H03M1/78
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