发明名称 ELECTRONIC CIRCUIT TESTING METHOD
摘要 PURPOSE:To carry out an effective test by using a defect information by a first test result in a second test and masking a defect indication of the second test result. CONSTITUTION:An information giving a suitable indication to a digit correspond ing to a group sequence of a serial scanning vector is loaded in a memory position capable of addressing of a mask memory 104, before performing a test. When a comparator 112 performs an error indication, this indication is fed to an error controller 116 and an information relating to an error position in a matrix is accumulated in an error memory 120. In a completion of a first test, the contents of the memory 120 are converted into an information indicat ing a position in a matrix of the digit for giving the error indication and this information is loaded 118. When it is loaded, a second test is done under a further strict condition, and when a defect is identified, the outputs of a bit counter 124, a vector counter 126 and a pointer 128 are stored in the memory for an analysis afterward.
申请公布号 JPS61210975(A) 申请公布日期 1986.09.19
申请号 JP19860047178 申请日期 1986.03.04
申请人 SONY TEKTRONIX CORP 发明人 MORISU EICHI GURIIN
分类号 G01R31/28;G01R31/3185;G06F11/22 主分类号 G01R31/28
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