发明名称 |
POWER DISTRIBUTION SYSTEM FOR MULTIPROCESSOR |
摘要 |
In a multiprocessor system interconnected by a bus structure that provides communication and information transfers between the processor modules of the system, each processor broadcasts a central message to all the other processors of the system on a periodic basis. A processor module not receiving the control message from a sending processor module will assume the sending processor module has failed, and operate to take over the task of the failed processor module. |
申请公布号 |
JPS60100252(A) |
申请公布日期 |
1985.06.04 |
申请号 |
JP19840184754 |
申请日期 |
1984.09.05 |
申请人 |
TANDEMU COMPUTER-ZU INC |
发明人 |
JIEEMUSU AREN KATSUTSUMAN;JIYOERU FUORUSOMU BAATORETSUTO;RICHIYAADO MATSUKU KUROUDO BIKUSURAA;UIRIAMU HENRII DEIBITSUDOO;JIYON AREKISANDAA DESUPOTAKISU;PIITAA JIYON GURAJIANO;MITSUCHIERU DENISU GURIIN;DEBITSUDO ARUBAATO GUREIGU;SUCHIIBUN JIYON HAYASHI;DEBITSUDO ROBAATO MATSUKII;DENISU REO MATSUKU EBOI;JIEEMUZU GARII TORAIBITSUGU;SUCHIIBUN UOOREN BUIERENGA |
分类号 |
G06F11/18;G06F1/26;G06F5/06;G06F7/78;G06F9/46;G06F9/52;G06F11/00;G06F11/10;G06F11/16;G06F11/20;G06F12/08;G06F12/10;G06F12/12;G06F12/14;G06F13/00;G06F13/12;G06F13/20;G06F13/28;G06F13/366;G06F13/38;G06F15/16;G06F15/167;G06F15/173 |
主分类号 |
G06F11/18 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|