发明名称 DATA BUS CONTROL CIRCUIT
摘要 PURPOSE:To speed up data transfer between circuits without using any microcomputer by adding a control output which indicates that data is outputted to or inputted from a data bus. CONSTITUTION:When a circuit 6 with a function transfers data to a circuit 7, the circuit 6 sends out a control output signal REQ and then a chip select signal CS is inputted to both circuits 6 and 7. Simultaneously, an input/output control signal R/W is controlled with the signal REQ of the circuit 6 so that the data bus of the circuit 6 operates in an output direction and the data bus of the circuit 7 operates in an input direction. When a clock signal is inputted from a terminal 5 to IE in said state, the circuit 6 inputs the data to the circuit 7 through the data bus. The data transfer from the circuit 7 to the circuit 6 is performed similarly.
申请公布号 JPS6097461(A) 申请公布日期 1985.05.31
申请号 JP19830204820 申请日期 1983.11.02
申请人 HITACHI SEISAKUSHO KK 发明人 ISHIZUKA KOUHEI;MAEDA SHIGEMICHI;NAKAGAWA JIYUNICHI;TAKIGAMI HIROSHI
分类号 G06F13/38;(IPC1-7):G06F13/38 主分类号 G06F13/38
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