发明名称 DEVICE USING PROCESSOR
摘要 PURPOSE:To detect quickly and exactly the abnormality of a program by simple constitution, by confirming a basic operation by which a read-out operation is executed by an address in a designated program area at the time of an instruction fetch cycle. CONSTITUTION:A program abnormality detecting circuit 4 is constituted of a program area setting part 1, instruction fetch cycle operation confirming part 2, and an abnormal signal holding part 3. As for the program area setting part 1, an address area determined at the time point when a device using a processor is completed is set. The instruction fetch cycle operation confirming part 2 outputs a program abnormality detecting signal EMSG1 of ''0'' and ''1'' in case program area coincidence confirming address signals AD1-ADn coincide with program area setting signals SWSG1-SWSGn, and if they do not coincide, respectively; when both an abnormality detecting synchronising signal ECLK1 and a read-out signal RD1 are ''1''.
申请公布号 JPS6095638(A) 申请公布日期 1985.05.29
申请号 JP19830202557 申请日期 1983.10.31
申请人 TOSHIBA KK 发明人 WATABE YUKITOSHI
分类号 G06F11/00;G06F11/36 主分类号 G06F11/00
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