发明名称 LOGICAL CIRCUIT
摘要 PURPOSE:To attain the efficiency of use of a gate and to reduce a delay path by constituting the circuit that the circuit is selected by a two-way input/output cell to eliminate the selection circuit in accommodating circuits used for different applications into one gate array. CONSTITUTION:A signal inputted from a line 303 is outputted to a line 301 in an input gate 31 and fed to the inside of gate array. An output gate 32 outputs a signal outputted from the gate array inside to the line 303 via a line 302. A point 33 becomes a contact in connecting the gate array inside to an external part. The gate 32 propagates or inhibits the signal propagated in the line 302 to the line 304. Through the constitution above, the point 33 being the external contact in the gate array is made to an input state or output state by changing a signal propagated through the line 304 and then two circuits are selected.
申请公布号 JPS6096026(A) 申请公布日期 1985.05.29
申请号 JP19830202661 申请日期 1983.10.31
申请人 TOSHIBA KK 发明人 SAKAI TAKAHIKO
分类号 H03K19/0175;H03K19/00;(IPC1-7):H03K19/00 主分类号 H03K19/0175
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