发明名称 Electronic impedance circuit including a compensation arrangement for d.c. offset
摘要 An electronic impedance circuit is constructed of a voltage-current converter and a variable gain current amplifier. The voltage-current converter includes first and second transistors of the PNP-type differentially connected. The variable gain current amplifier includes third and fourth transistors of the NPN-type differentially connected, and fifth and sixth transistors of the PNP-type as load means. The bases of the third and fourth transistors are respectively driven by collector signals of the first and second transistors, and a collector signal of the third transistor is fed back to the base of the second transistor. In order to reduce a d.c. offset attributed to a current flowing between the base of the second transistor and the collector of the third transistor, a compensation circuit is connected to the variable gain amplifier. This compensation circuit can provide compensation by producing a compensation current for cancelling the current between the base of the second transistor and the collector of the third transistor.
申请公布号 US4520282(A) 申请公布日期 1985.05.28
申请号 US19820411997 申请日期 1982.08.27
申请人 HITACHI, LTD.;PIONEER ELECTRONIC CORPORATION 发明人 WATANABE, KAZUO;OHKUBO, YUICHI;HAENO, AKIRA;YOKOGAWA, FUMIHIKO
分类号 H03G3/10;H03F3/45;H03H11/46;(IPC1-7):H03K3/023;H03H11/00 主分类号 H03G3/10
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