发明名称 |
METHOD AND DEVICE TO CONTROL THE CONFLICTS POSED BY MULTIPLE ACCESSES TO A SAME CACHE-MEMORY OF A DIGITAL DATA PROCESSING SYSTEM COMPRISING AT LEAST TWO PROCESSORS EACH POSSESSING A CACHE |
摘要 |
A data processing system includes at least two processors, each having a cache memory containing an index section and a memory section. A first processor performs a task by deriving internal requests for its cache memory which also may respond to an external request derived from the other processor which is simultaneously processing a task. To avoid a conflict between the simultaneous processing of an internal request and of an external request by the same cache memory, one request may act on the other by delaying its enabling or by suspending its processing from the instant at which these requests are required to operate simultaneously on the index section or the memory section of the cache memory of the processor affected by these requests. Thereby, the tasks are performed by the system at an increased speed. |
申请公布号 |
DE3169774(D1) |
申请公布日期 |
1985.05.15 |
申请号 |
DE19813169774 |
申请日期 |
1981.01.19 |
申请人 |
COMPAGNIE INTERNATIONALE POUR L'INFORMATIQUE CII - HONEYWELL BULL (DITE CII-HB) |
发明人 |
BACOT, PIERRE CHARLES AUGUSTIN;ISERT, MICHEL |
分类号 |
G06F12/08;G06F13/16;(IPC1-7):G06F13/00 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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