| 摘要 |
PURPOSE:To improve the efficiency of debugging by calculating the difference between latched address data and the current address when the fetch of an operation code is detected, and writing the address when borrowing occurs or when the difference exceeds maximum machine word length. CONSTITUTION:The operation code fetch signal MI and memory code signal MEMR of a CPU are supplied to a latch circuit 1 through an AND gate 7, the difference between the address data on an address bus which is latched at this time and address data on the bus which is inputted to a subtracting circuit 3 is calculated, and the result is compared with the maximum machine word length of a setting part 5 by a comparator 4. The compared result and the borrow signal of the circuit 3 are supplied to an AND gate 8 through an OR gate 6 and ANDed with the read data of a memory during the fetch of the operation code to supply a write signal to a trace memory 9. Consequently, the address of a program branch point is traced. |
