发明名称 SEMICONDUCTOR TEST METHOD
摘要 PURPOSE:To realize evaluation of electromigration of efficient gate electrode by applying a current after applying a voltage in the same polarity as the actual bias condition between the drain and gate terminals of the Schottky junction type FET. CONSTITUTION:A voltage of the same polarity (a positive voltage to the drain while a negative voltage to the gate) as the actual bias condition is applied between the source and gate of Schottky junction type FET, such FET is then placed under the specified environment for the specified period and thereafter change of characteristic is checked. According to this method, the test method is simplified and a heavy current is freely applied. Thereby, electromigration can be accelerated freely and as a result test time can be curtailed. Simultaneously since two actual conditions are sufficiently satisfied, electromigration of gate electrode can be evaluated efficiently.
申请公布号 JPS6080236(A) 申请公布日期 1985.05.08
申请号 JP19830188189 申请日期 1983.10.07
申请人 NIPPON DENKI KK 发明人 HIRAKAWA YUKIO
分类号 G01R31/26;G01R31/28;G01R31/30;H01L21/66;H01L29/76;H01L29/772;H01L29/78 主分类号 G01R31/26
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