| 摘要 |
PURPOSE:To improve the frequency tuning accuracy by controlling an output frequency of a frequency synthesizer according to an oscillated frequency of a fixed oscillator. CONSTITUTION:The frequency synthesizer SYN2 consists of a PLL circuit comprising a VCO2a, a loop filter 2b, a phase comparator 2c, a reference frequency oscillator 2d, a frequency converter 2e and a variable frequency divider 2f. An input signal of frequency fR is mixed (3) with a frequency fL1 of the SYN2 by a frequency converter 3, converted into a frequency fIF1 and becomes fIF1=fL1- fR through a BPF4. The frequency becomes fL1=fL2+Nf1 and fIF1=fL2+Nf1- fR, where N is a frequency dividing ratio of frequency divider 2f and f1, fL2 are oscillating frequencies of the oscillator 2d and the fixed oscillator 6 respectively. The fIF1 is mixed with an output signal of the oscillator 6 by the frequency converter 5, converted into the fIP2 and becomes fIF2=fL2-fIF1=fR-Nf1. The frequency tuning is attained by changing the value of the frequency dividing ratio N in response to the input signal frequency fR and the output stability of an output signal is not affected by the frequency fluctuation of the oscillator 6. |
