| 摘要 |
PURPOSE:To set the input signal to optimum level, by holding the input signal level after A/D conversion and controlling the attenuation of the resistor attenuators located on the transmission line digitally. CONSTITUTION:When the switch 8 si depressed, the input signal is converted 9 to the DC voltage corresponding to the peak level, and the sample value of a given period is A/D converted 7. The clock pulse is generated 10, it is fed to the digital counter 5 via the AND gates 12,13, and the count value corresponding to the sample value is outputted. The maximum value of the count value is held with the latch circuit 14 and the comparator 15, the maximum values B1 to B4 are outputted for the switch depression period, the analog switches 18,22,26,30 of the resistor attenuator group 3 are controlled to control the overall attenuation. When the switch 8 is turned off, the counter 5 does not count and clear, and the latch circuit keeps the value before. Thus, automatic setting at the optimum level can be made without compressing the dynamic range of input signal. |
