发明名称 Second or higher order PLL with increased low and medium frequency gain
摘要 A second or third-order phase-locked loop with higher loop gain at medium and low frequencies, while avoiding the problem of amplifier saturation caused by high amplifier gain combined with the DC offset of imperfect phase detectors, includes a voltage controlled oscillator and a phase detector for comparing the phase of the reference oscillator and the VCO. In a third-order embodiment, two operational amplifiers are connected in series between the output of the phase detector and the input to the VCO, each amplifier having an associated feedback circuit including a series capacitor and a resistor to provide gain shaping. A Tee circuit is provided from the output of one of the amplifiers to the input of the other, and includes a shunt-connected capacitor to provide low frequency sensitive feedback to reduce the gain of the amplifiers at frequencies approaching DC, thereby preventing saturation and enabling increased loop gain at frequencies thereabove.
申请公布号 US4514706(A) 申请公布日期 1985.04.30
申请号 US19820423361 申请日期 1982.09.24
申请人 ROCKWELL INTERNATIONAL CORPORATION 发明人 THOMPSON, WILLIAM J.
分类号 H03L7/093;(IPC1-7):H03L7/06 主分类号 H03L7/093
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