发明名称 FRAME SYNCHRONIZING CIRCUIT
摘要 PURPOSE:To ensure the normal function of an error correcting circuit with no increase of errors by deleting the phase uncertainness after fixing the frame synchronization by the differential detection and then fixing the multi-frame synchronization. CONSTITUTION:A synchronizing signal separating circuit 3 separates a frame synchronizing signal F' and a multi-frame synchronizing signal MF' from the received and demodulated time division multiplex signal. A differential detection circuit 9 detects differentially the signal F'. A synchronism control circiut 4 decides the synchronization by the output signal of the circuit 9. A phase uncertainness deleting circuit 10 deletes the phase uncertainness of the signal MF'. A gate circuit 5 supplies the output signals of the circuit 10 as well as a pattern generating circuit 6 which produces a signal having the same pattern as the signal MF'. A gate circuit 12 supplies the output of the circuit 6 together with the signal MF'. A differential detection circuit 13 gives the differential detection to the output signal of the circuit 12. A synchronism control circuit 11 gives the synchronizing decision of the signal MF' with the output signals of circuits 5 and 13. An uncertainness deleting circuit 17 deletes the phase uncertainness of the received and demodulated time division multiplex signal according to the polarity of the signal F' and the output signal of the circuit 12.
申请公布号 JPS6074856(A) 申请公布日期 1985.04.27
申请号 JP19830182591 申请日期 1983.09.30
申请人 NIPPON DENKI KK;NIPPON DENSHIN DENWA KOSHA 发明人 TANIGUCHI TAICHI;SHIYOUMURA TATSUROU;KOORI TAKEJI;KUBOTA SHIYUUJI
分类号 H04L27/18;H04J3/06;H04L27/22 主分类号 H04L27/18
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