发明名称 DATA ADDRESSING SYSTEM
摘要 PURPOSE:To speed up the processing of a microcontroller for control by synthesizing a base address and an offset address consisting of a file attribute and a location address based upon it, through hardware, and producing an effective address. CONSTITUTION:A CPU A1 which knows previously which data area, which data, and in what order a CPU B3 accesses stores offset addresses consisting of file attributes and location addresses in a control information storage part 6 composed of FIF0 in access order. The CPU B2 when accessing data generates only a signal base address file invariably and specifies a data area group 40. Further, an address composition part 11 of hardware makes the offset address from CPU A1 and the base address from the CPU B2 into one to assist the selection of the data area.
申请公布号 JPS6069745(A) 申请公布日期 1985.04.20
申请号 JP19830176222 申请日期 1983.09.26
申请人 HITACHI SEISAKUSHO KK 发明人 KIMURA KOUICHI;AOTSU HIROAKI
分类号 G06F9/38;G06F9/355;G06F12/00;G06F15/16;G06F15/177 主分类号 G06F9/38
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