| 摘要 |
PURPOSE:To obtain a frequency controlling circuit suitable for circuit integration and high in AFC accuracy by expanding the first pulse width when phase of a horizontal synchronizing signal goes ahead of reference phase of an oscillation frequency output signal of an ACO circuit according to the amount of advance of the phase and expanding the second pulse width when retarded according to the amount of retardation in a video tape recorder (VTR) etc. CONSTITUTION:When phase of a horizontal synchronizing signal HSYNC goes ahead of a reference time, time width of positive pulse of an AFC error signal S8 is expanded by time width corresponding to gained time. Consequently, voltage Vc of a voltage converting circuit is raised, and oscillation frequency of a VCO circuit 5 is locked at said advanced phase. On the other hand, phase of the horizontal synchronizing signal HSYNC is later than reference time, and rise of the horizontal synchronizing signal HSYNC is generated in the section of time window, time width of negative pulse of the AFC error signal S8 becomes wider than time width of positive pulse by time corresponding to the phase retardation, and phase of dividing output S7 of a divider 11 is retarded, and the reference time is locked at timing of rising of the horizontal synchronizing signal HGYNC. |
