发明名称 TESTING SYSTEM OF CONTENTION OPERATION
摘要 PURPOSE:To improve the reliability of a test of contention operation by discriminating the occurrence state of contention by the contents of a display register for the contention state, and deciding whether the processing result of a contention arranging circuit is proper or not. CONSTITUTION:The contention arranging circuit BA is provided with, for example, three gate circuits G1-G3, to which three kinds of processing request A, B, and C are inputted to output bus use permit signals (a), (b), and (c). Further, a contention display circuit AP is provided with a decoder DEC and four contention display registers REG1-REG4 corresponding to the three kinds of request, and the requests A-C are inputted to the circuit AP and decoded by the decoder DEC to be set in registers REG1-REG4. Namely, the requests are set in the register REG1 when A, B, and C content with one another, in the register REG2 when A and B, in the register REG3 when A and C, or in the register REG4 when B and C. Consequently, it is judged whether contention arrangement processing is performed or not, so the contention operation is confirmed easily.
申请公布号 JPS6063642(A) 申请公布日期 1985.04.12
申请号 JP19830169331 申请日期 1983.09.16
申请人 FUJITSU KK 发明人 SUZUKI MASANORI
分类号 G01R31/00;G06F11/22;G06F11/277;G06F15/16;G06F15/177;H04M3/26 主分类号 G01R31/00
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