| 摘要 |
PURPOSE:To decrease power consumption and at the same time to ensure a high-speed access by detecting the output change of a sence amplifier and cutting off a memory cell to charge a bit line after the data is read out of the memory cell. CONSTITUTION:As a bit line is already charged in a preceding cycle, a precharge signal (a) of 5 obtains an H level at an early time compared with a conventional time only by setting the output of a sence amplifier at an L level. Then a word line is set at the H level through a word control circuit 9 and then an AND circuit 19. Thus a memory cell is selected. Hereafter the memory cell data given fron a pair of bit lines is sent to a pair of input/output lines and supplied to a sense amplifier 14. When a single side of wiring 16 through which the output of an amplifier 14 is sent to a pair of output buffers is set at the H level or higher, a sense amplifier output circuit 18 is operated. Then an AND circuit is actuated to set the word line at an L level, and the memory cell is cut off the bit line. At this time point, 20 of a precharge signal 6 is set at L level. Then the bit line is charged up to the H level by a transistor 21. |
